TopQAD Documentation

Quantum Resource Estimation (QRE)

This page uses the terminology and concepts discussed in the Quantum Architecture Basics section.

Introduction

**Figure 7.** Flow diagram of TopQAD’s QRE service, which employs all of TopQAD’s tools in a pipeline (illustrated within the dashed blue line) to provide quantum resource estimates. It invokes the **Assembler** to determine and optimize the logical and physical microarchitecture by considering both the compiled quantum algorithm’s output from the Compiler and the target hardware specifications as processed by the Noise Profiler into logical error rates. Note that, while the microarchitecture of core processors are completely determined after running the Compiler, detailed layouts of other modules are determined by the Assembler.

The QRE service helps you design and evaluate fault-tolerant quantum computers and their applications, prior to physical devices being built. The service uses a software pipeline that invokes TopQAD’s Compiler, Noise Profiler, and Assembler tools. These tools form the basis of a real quantum computer’s software compilation stack, turning a high-level quantum algorithm into machine-level instructions for the quantum computer. They can be incorporated as built-in components of a quantum OS that would run applications on the quantum hardware stack, while also deploying diagnostics, maintenance, and calibration processes. It is this level of operational detail that enables the QRE service to perform comprehensive quantum architecture design and resource estimation.

The QRE service designs a fault-tolerant quantum microarchitecture (see Assembler) for an input quantum algorithm, error budget, and a set of hardware specifications. The hardware noise model parameters are used to determine (see Noise Profiler) the performance of FTQC protocols¹ that are needed for universal FTQC. The microarchitecture is designed to minimize the runtime of the compiled quantum algorithm (see Compiler), as well as the physical qubit count, while staying within the error budget. After this optimization, the service generates a report on the designed microarchitecture, including concrete resource estimates, monetary costs, and other operational details. Thus, the QRE service allows you to run experiments to explore design and resource trade-offs, helping to answer questions such as the following:

To what extent does a given system for quantum computation have to scale to achieve practical utility?
How many physical qubits are required to run an algorithm, given hardware specifications (e.g., qubit and gate fidelities) such as those currently available?
Where should development efforts be focused to overcome bottlenecks (e.g., in decoders or specific hardware components)?
How are physical resources allocated across different modules, such as the core processor and magic state factory?

Portal Specifications

QRE Portal Access Specifications

Inputs

In the QRE service, you can either review the status of your recent runs under "Recent runs" or start a new one by providing inputs under "Create a new run". Clicking on one of your recent runs redirects you to a page showing the status of your run. If your run is complete, it will redirect you to the completed QRE report. The following are the input parameters required to start a run:

	Parameter	Description
General	Error budget	The maximum accumulated error tolerated across the computation.
	Circuit file	A quantum circuit file. The QRE service supports a subset of the language features of OpenQASM 2.0 format. Currently, users can choose circuits from a select library of example circuits. The option to upload your own circuits will be available shortly, and further details on the supported OpenQASM 2.0 format will be provided. Support for richer quantum languages will be added soon.
	Repeat input circuit	Sometimes users may wish to repeat an input circuit. An example of this is in the case of Trotterization, where each Trotter step repeats the same circuit. If this option is selected, the Compiler is run once for the input circuit, but subsequent steps in the QRE service will utilize the repeated circuit. If this option is not selected, the input circuit will be the circuit used in the resource estimation as is.
	Number of repetitions	The number of times to repeat the circuit, if “Repeat input circuit” is selected.
	Insights only	If selected, the QRE service will skip the generation of the detailed compiled circuit when generating the QRE report. This allows for faster report generation and reduced resource usage.

Advanced Configurations

	Parameter	Description
Cost parameters	Cost ($/qubit-second)	The cost associated with using a qubit for one second. It is an optional parameter that users can provide to estimate the overall cost of the quantum computation in the scenario where the computation is run on a specific hardware platform with known pricing. If no value is entered, or a 0-valued cost is entered, the computation cost will not be reported at the time of output.
Noise Profiler parameters	Noise profiler presets	Available options for the noise model are provided in a drop-down menu. The parameters defining each preset are described in the Noise Profiler >>> Physical Depolarizing section. The selected preset will be used to generate a noise profile using the physical depolarizing noise model and the following protocols: quantum memory, lattice surgery, and magic state cultivation [10]. The noise profile is generated for a system using rotated surface code and PyMatching, a minimum-weight perfect matching decoder.

Outputs

	Parameter	Description
Space–Time trade-off	Space–Time trade-off	An interactive plot with all the resource estimates generated that belongs to the Pareto frontier of the biobjective optimization problem solved to minimize the space (physical qubit count) and time (expected runtime) when designing the logical microarchitecture. Each point represents a trade-off between these two resources.
Summary	Expected runtime	The expected time needed to perform a quantum computation.
	Number of physical qubits	The estimated number of physical qubits required for the computation.
	Computation cost	The estimated cost of the quantum computation, taking into account the expected runtime and the number of physical qubits used, if a cost model is provided.
Compiled circuit	Compiled circuit	A detailed list of the lattice surgeries performed in the memory zone of the core processor, including which patches are required for each lattice surgery and the order in which these surgeries are performed. This is only provided if the `Insights only` toggle is disabled. It is a JSON file in the format `<time step>: [<operation ID>, [<patch connections used by the lattice surgery>]]`. An example is shown below: `[ {"0": [ [0, [[["m0", "Z"], 1], [1, 2], [2, 6], [6, ["q1", "Z"]]]], [2, [[["m1", "Z"], 4], [4, 7], [7, 5], [5, ["q0", "Z"]]]]] ]}, {"1": [ [1, [[["m0", "Z"], 1], [1, 2], [2, 6], [6, ["q2", "Z"]]]], [3, [[["m1", "Z"], 4], [4, 7], [7, ["q3", "Z"]]]]] ]} ]`
Error budget	Error budget	The maximum accumulated error tolerated across the computation as provided in the input.
	Accumulated error	An upper bound on the computational error accumulated from the circuit synthesis and the modules used in the computation. It must be below the error budget.
	Error source	For the microarchitectures developed by TopQAD, error sources are currently categorized as follows: synthesis: errors generated with the approximation of gates from the original circuit to the ISA gate set during compilation. core processor: errors arising from the implementation of the quantum circuit, including lattice surgeries and memory stabilization of idling computational qubits. magic state factory: errors introduced during the preparation and distillation of magic states, including memory stabilization of idling correction qubits and code growth.
	Error contribution	The contribution of each error source to the overall accumulated error. This is used to identify and mitigate the most significant sources of error in the computation process.
Logical resources	Tile count	The number of tiles used in each zone of the microarchitecture for the computation. The tiles count are provided by type (e.g., bus, computational qubit, etc.) and zone (e.g., core processor and each distillation level in the MSF).
Physical resources	Zone	Architecture zone.
	Code distance	The code distance for encoding logical qubits in this zone.
	Physical qubits per logical tile	The number of physical qubits used to encode each logical tile in this zone.
	Physical qubit count	The total number of physical qubits in this zone.
	% of physical qubits	The percentage of physical qubits in this zone relative to the total number of physical qubits used in the architecture.
Magic state factory	Distillation rate	The rate at which the MSF delivers magic states to the core processor at the required fidelity, expressed as time per magic state. This value is shown alongside a comparison against the logical cycle time of the core processor, highlighting how quickly the MSF can meet computational demand. For seamless operation in a time-optimal regime, the distillation rate ideally should match either the logical cycle time or the memory reaction time, whichever is faster.
Magic state factory [Distillation levels]	Level	The distillation level number. The magic states flow from lower to higher levels in the MSF.
	Protocol	The distillation protocol used by the units at this level.
	Units	The number of distillation units at this level.
	Cycle runtime	The time required for one distillation cycle within a unit at this level.
	Acceptance prob.	The probability that a distillation cycle within a unit successfully produces higher-fidelity magic states.
	Output error rate	The error rate of the magic states distilled by units at this level.
Magic state factory [Fidelity evolution]	Threshold error rate after final stage	The error rate required for the magic states after the final distillation stage.
	Stage	The stage in the distillation process.
	Error rate	The error rate of the magic states output at this stage. Error rates provided after distillation levels include the output error rate of the units at this level and the code growth¹ performed when transitioning to the next stage or the core processor, if applicable.
Noise profile [QECC metrics]	Logical cycle time	The time taken to perform one logical operation on logical qubits of code distance $d$ . The logical cycle time may be different in each zone. The fitting function used to calculate the logical cycle time in seconds is provided, as well as the logical cycle time by zone.
Noise profile [Memory]	Logical error rate	For the memory protocol, the fitting function for the logical error rate (LER) as a function of code distance $d$ , along with a plot of LER versus distance. The LER for each zone is also provided.
Noise profile [Memory]	Reaction time	For the memory protocol, the time required to decode the logical operation as a function of the code distance $d$ . The reaction time may be different in each zone. The fitting function to calculate the reaction time in seconds is provided, as well as the reaction time by zone.
Noise profile [Magic state preparation cultivation]	Logical error rate	For the magic state preparation cultivation protocol, the fitting function for LER as a function of code distance $d$ . The LER for each zone is provided.
Noise profile [Magic state preparation cultivation]	Discard rate	For the magic state preparation cultivation protocol, the fitting function for the discard rate (DR) as a function of code distance $d$ . The DR for each zone is provided.
Noise profile [Lattice surgery]	Logical error rate	For the lattice surgery protocol, the fitting function for LER as a function of code distance $d$ , the number of logical qubits involved in the lattice surgery $K$ , and the number of bus patches involved in the lattice surgery $B$ . Plots of LER versus distance and LER versus number of rounds are shown. The LER for each zone is also provided.
Noise profile [Lattice surgery]	Reaction time	For the lattice surgery protocol, the time required to decode the logical operation as a function of the code distance $d$ . The reaction time may be different in each zone. The fitting function to calculate the reaction time in seconds is provided, as well as the reaction time by zone.
Compiling [Compiled circuit summary]	Circuit file name	The name of the file containing the compiled circuit.
	ISA gate set	The ISA gate set used to represent operations in the circuit as required for the output architecture. The Pauli rotations gate set is currently supported.
	Computational qubits	The number of logical qubits used in the computation.
	$\pi/4$ rotations	The number of $\pi/4$ rotations in the circuit after compilation.
	$\pi/8$ rotations	The number of $\pi/8$ rotations in the circuit after compilation.
	Measurements	The number of logical measurements other than $\pi/4$ and $\pi/8$ rotations in the circuit after compilation.
	Synthesis error	The error rate accumulated by the synthesized circuit when converting logical operations to the ISA gate set.